An ONetSwitch dedicates to networking applications, as what the product name implies. The 'All-Programmable' allows the users to get any of their inspiration realized by customizing the gateware and/or the software.
Reference designs here would help you
to comprehend the usage of board components in different cases
to avoid developing from scratch, especially for beginners
to share your mind and contribute to our community
The following designs are freely available:
Superior to the preliminary OpenFlow Switch design, this design allows users to build more complicated designs. Advanced functions are available for
SDN switch is available on purchase, based on which the following designs are built. Please send email to Yinspect Inc. for details.
A set of real-time topology of the entire network monitoring, rapid fault location and fault re-routing, network streaming service bandwidth management and adjustment of the data center network management system
The entire system, top-down view, is divided into four levels constitute: Web interface layer, database synchronization layer, data link control layer and exchange layer
Core chip of ONetSwitch is a new generation of fully programmable Xilinx Zynq-7000 series chip, which contains a general purpose ARM cortex A9 processor and FPGA, inheriting the advantages of the hardware that can be softwared.The hardware has extremely powerful network flow processing and forwarding capacity, the software can better handle the register, run more software APP, which makes it better to support more network applications as possible, we have now realized the switches, routers, OpenFlow switches and other functions.
Ryu is an OpenFlow controller implemented in python, it's name is "stream" means in Japanese, Ryu Foreign ᨀ for the REST API interfaces and user RPC calls. Ryu interior comprises several different levels, he supported the latest OpenFlow protocol. The user can write a program or use the built-in RESTful API are two ways to get the current Ryu control SDN network status, and for the next flow table SDN hair and other operations
Over the past few years, SDN in the entire computer field has made tremendous development. The new architecture using a control plane and data plane isolated network to inject new vitality, but because of the difference between SDN architecture and traditional network architectures, the deployment of real SDN test environment is not an easy thing. SDN deployment of real experimental environment, not only switches on the SDN lot of demand, but also a large number of hosts demand, resulting in experiments conducted SDN network efficiency is very low. The InterONet system is the need for such large-scale distributed SDN experimental design platform based on real-world environment.
Open vSwitch, are easy to deploy and modify, but they are hard to guarantee the performance for wire-speed processing. NetFPGA is quite successful to open a way for changing the hardware logic through FPGA, but it also has limitations, e.g., a host server is further required, the logic resource is not enough for OFS processing, and bottleneck PCI interface between host CPU and NetFPGA (NetFPGA 1G version)
We have designed an all programmable SDN switch (named as ONetSwitch) and a DCN testbed on the desktop (named DesktopDC) based on ONetSwitch. The merits of DesktopDC are its small size, low power, and flexible programmability. Among many building cases, we briefly describe two of them in this paper: one is SDN based routing and the other is Hadoop based computing.